## About

Created a RISC CPU capable of running a Turing-complete set of instructions, meaning it could theoretically run any program given enough resources. Developed using Verilog on the DE1-SoC FPGA. This was part of CPEN 211 Labs, so code is not publicly shared.

## What I worked on

• FPGA Implementation
• Digital Design

## Built with

Verilog, FPGA, DE1-SoC